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ID: 87796 - VISCUBE: A multi-layer vision chip
|
1579
|
|
ID: 402114 - White Paper on Artificial Intelligence, Robotics and Data Science
|
1230
|
|
ID: 88583 - CMOS SPADs selection, modeling and characterization towards image sensors implementation
|
1204
|
|
ID: 402115 - Our Future? Space Colonization and Exploration
|
880
|
|
ID: 254664 - Towards an ultra‐low‐power low‐cost wireless visual sensor node for fine‐grain detection of forest fires
|
785
|
|
ID: 2547 - CMOS Cascade Sigma-Delta Modulators for Sensors and Telecom: Error Analysis and Practical Design.
|
539
|
|
ID: 87667 - An all-inversion-region gm/ID based design methodology for radiofrequency blocks in CMOS nanometer technologies
|
536
|
|
ID: 87803 - CMOS Sigma-Delta converters: Practical design guide
|
510
|
|
ID: 89531 - A 3-D chip architecture for optical sensing and concurrent processing
|
485
|
|
ID: 2544 - Systematic Design of CMOS Switched-Current Bandpass Sigma-Delta Modulators for Digital Communication Chips
|
468
|
|
ID: 89822 - A 64×64 CNN universal chip with analog and digital I/O
|
468
|
|
ID: 96544 - 3D multi-layer vision architecture for surveillance and reconnaissance applications
|
459
|
|
ID: 89032 - A CMOS-3D reconfigurable architecture with in-pixel processing for feature detectors
|
458
|
|
ID: 88706 - A 0.2-to-2MHz BW, 50-to-86dB SNDR, 16-to-22mW Flexible 4th-Order ΣΔ modulator with DC-to-44MHz tunable center frequency in 1.2-V 90-nm CMOS
|
453
|
|
ID: 89130 - Stopping criteria in evolutionary algorithms for multi-objective performance optimization of integrated inductors
|
448
|
|
ID: 2538 - CMOS Comparators
|
446
|
|
ID: 88610 - Image filtering by reduced kernels exploiting kernel structure and focal-plane averaging
|
445
|
|
ID: 89014 - A reconfigurable neural spike recording channel with feature extraction capabilities
|
440
|
|
ID: 89127 - An enhanced MOEA/D-DE and its application to multiobjective analog cell sizing
|
435
|
|
ID: 89216 - Behavioral modeling techniques for teaching communication circuits and systems
|
433
|
|
ID: 89525 - A 176x144 148dB adaptive tone-mapping imager
|
433
|
|
ID: 46492 - Improving the accuracy of RF alternate test using multi-VDD conditions: application to envelope-based test of LNAs
|
432
|
|
ID: 87712 - Hardware implementation of a real-time image segmentation circuit based on fuzzy logic for edge detectionapplication
|
430
|
|
ID: 89015 - Digital processor array implementation aspects of a 3D multi-layer vision architecture
|
430
|
|
ID: 89182 - A 148dB focal-plane tone-mapping QCIF imager
|
427
|
|
ID: 98661 - Applications of evolutionary computation techniques to analog, mixed-signal and RF circuit design - an overview
|
422
|
|
ID: 88629 - Wi-FLIP: A wireless smart camera based on a focal-plane low-power image processor
|
420
|
|
ID: 2561 - A CMOS fully-differential bandpass ΣΔ modulator using switched-current circuits
|
419
|
|
ID: 226532 - Diseño lógico de circuitos digitales usando dispositivos con característica NDR
|
418
|
|
ID: 89432 - A CMOS vision system on-chip with multicore sensory processing architecture for image analysis above 1,000F/s
|
413
|
|
ID: 98657 - A flexible resonation-based cascade ΣΔ modulator with simplified cancellation logic
|
413
|
|
ID: 89118 - Reducing bit flipping problems in SRAM physical unclonable functions for chip identification
|
412
|
|
ID: 254665 - Fire detection with a frame-less vision sensor working in the NIR band
|
409
|
|
ID: 93237 - A 1.2V 5.14mW quadrature frequency synthesizer in 90nm CMOS technology for 2.4GHz ZigBee applications
|
409
|
|
ID: 89293 - Baseband-processor for a passive UHF RFID transponder
|
406
|
|
ID: 93199 - A vision-based monitoring system for very early automatic detection of forest fires
|
402
|
|
ID: 89294 - A comparative study of low-noise amplifiers for neural applications
|
400
|
|
ID: 88604 - 2.4-GHz single-ended input low-power low-voltage active front-end for zigbee applications in 90 nm CMOS
|
399
|
|
ID: 89196 - A preamplifier for the front-end readout system of particles tracking in secondary electron detectors
|
399
|
|
ID: 242349 - A 5 GHz LC-VCO with active common mode feedback circuit in sub-micrometer CMOS technology
|
398
|
|
ID: 2559 - A fourth-order bandpass ΣΔ modulator using current-mode analog/digital circuits
|
398
|
|
ID: 2536 - BandPass Sigma-Delta Analog-to-Digital Converters
|
396
|
|
ID: 31715 - On-chip biased voltage-controlled oscillator with temperature compensation of the oscillation amplitude for robust I/Q generation
|
392
|
|
ID: 89635 - A review of low-noise amplifiers for neural applications
|
392
|
|
ID: 89735 - A statistical optimization-based approach for automated sizing of analog cells
|
392
|
|
ID: 89145 - Undersampling RF-to-digital CT ΣΔ modulator with tunable notch frequency and simplified raised-cosine FIR feedback DAC
|
390
|
|
ID: 232363 - Efficient selection of signatures for analog/RF alternate test
|
387
|
|
ID: 89467 - Multi-resolution low-power Gaussian filtering by reconfigurable focal-plane binning
|
387
|
|
ID: 58433 - OBT for settling error test of sampled-data systems using signal-dependent clocking
|
384
|
|
ID: 88625 - Demo: Real-time remote reporting of active regions with Wi-FLIP
|
384
|
|
ID: 89462 - Design of a smart SiPM based on focal-plane processing elements for improved spatial resolution in PET
|
384
|
|
ID: 89443 - Focal-plane generation of multi-resolution and multi-scale image representation for low-power vision applications
|
383
|
|
ID: 88642 - A self-calibration circuit for a neural spike recording channel
|
380
|
|
ID: 89407 - A prototype node for wireless vision sensor network applications development
|
379
|
|
ID: 89889 - An accurate error control mechanism for simplification before generation algorithms
|
379
|
|
ID: 98576 - A BIST solution for the functional characterization of RF systems based on envelope response analysis
|
377
|
|
ID: 87666 - A focal plane processor for continuous-time 1-D optical correlation applications
|
375
|
|
ID: 89030 - A 100kHz–10MHz BW, 78-to-52dB DR, 4.6-to-11mW flexible SC ΣΔ modulator in 1.2-V 90-nm CMOS
|
375
|
|
ID: 89887 - A simplification before and during generation methodology for symbolic large-circuit analysis
|
372
|
|
ID: 87807 - Device-level modeling and synthesis of high-performance pipeline ADCs
|
370
|
|
ID: 89094 - Using nanoHUB.org for teaching and learning nanoelectronic devices in materials engineering
|
370
|
|
ID: 2539 - Tools for Automated Design of ΣΔ Modulators
|
368
|
|
ID: 102778 - Microelectronics implementation of directional image-based fuzzy templates for fingerprints
|
364
|
|
ID: 89188 - An RF-to-DC energy harvester for co-integration in a low-power 2.4 GHz transceiver frontend
|
364
|
|
ID: 88455 - A 55 µW programmable gain amplifier with constant bandwidth for a direct conversion receiver
|
362
|
|
ID: 89529 - High-speed global shutter CMOS machine vision sensor with high dynamic range image acquisition and embedded intelligence
|
362
|
|
ID: 88751 - A 3.6mW @ 1.2V high linear 8th-order CMOS complex filter for IEEE 802.15.4 standard
|
361
|
|
ID: 89457 - An auto-calibrated neural spike recording channel with feature extraction capabilities
|
361
|
|
ID: 90831 - A method for bioimpedance measure with four- and two-electrode sensor systems
|
361
|
|
ID: 88566 - Real-time remote reporting of motion analysis with Wi-Flip
|
360
|
|
ID: 88781 - Design of a 1-V 90-nm CMOS folded cascode LNA for multi-standard applications
|
360
|
|
ID: 89305 - Surrogate models of Pareto-optimal planar inductors
|
359
|
|
ID: 89408 - Multi-objective performance optimization of planar inductors
|
358
|
|
ID: 2557 - Interactive verification of switched-current ΣΔ modulators
|
357
|
|
ID: 88786 - A comparative study of biasing circuits for an inductorless wideband Low Noise Amplifier
|
357
|
|
ID: 92480 - A low-voltage flexible cascade ΣΔ modulator for beyond-3G wireless telecom
|
357
|
|
ID: 456444 - White Paper 11: Artificial intelligence, robotics and data science
|
356
|
|
ID: 88636 - A 350 µW 2.3 GHz integer-N frequency synthesizer for body area network applications
|
355
|
|
ID: 89223 - Power-efficient focal-plane image representation for extraction of enriched Viola-Jones features
|
355
|
|
ID: 254821 - Analog/RF and Mixed-Signal Circuit Systematic Design
|
354
|
|
ID: 88459 - Low power implementation of trivium stream cipher
|
354
|
|
ID: 31284 - (Some) Open problems to incorporate BIST in complex heterogeneous integrated systems
|
353
|
|
ID: 87711 - Focal-plane dynamic texture segmentation by programmable binning and scale extraction
|
352
|
|
ID: 89114 - ASIC-in-the-loop methodology for verification of piecewise affine controllers
|
352
|
|
ID: 89192 - A power-scalable concurrent cascade 2-2-2 SC ΣΔ modulator for software defined radio
|
352
|
|
ID: 2594 - Non-ideal quantization noise shaping in switched-current bandpass ΣΔ modulators
|
351
|
|
ID: 90634 - An approach to the design of cascade ΣΔ modulators
|
351
|
|
ID: 31717 - Guidelines for the efficient design of sinewave generators for analog/mixed-signal BIST
|
349
|
|
ID: 90706 - A bio-inspired event-based real-time image processor
|
349
|
|
ID: 88611 - Layout-aware pareto fronts of electronic circuits
|
348
|
|
ID: 92210 - Fuzzy end-to-end rate control for internet transport protocols
|
348
|
|
ID: 31268 - Low-cost signature test of RF blocks based on envelope response analysis
|
347
|
|
ID: 96549 - Accurate design of a MOS-based resistive network for time-controlled diffusion filtering
|
347
|
|
ID: 242357 - Using physical unclonable functions for hardware authentication: a survey
|
346
|
|
ID: 2537 - High-Order Cascade Multi-bit ΣΔ Modulators
|
345
|
|
ID: 89399 - A power efficient neural spike recording channel with data bandwidth reduction
|
345
|
|
ID: 88612 - LDS - A description script for layout templates
|
343
|
|
ID: 89541 - High radix implementation of Montgomery multipliers with CSA
|
343
|
|
ID: 102776 - Voltage mode driver for low power transmission of high speed serial AER links
|
342
|
|
ID: 254895 - Ultra Low Power Transceiver for Wireless Body Area Networks
|
342
|
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