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Reducing bit flipping problems in SRAM physical unclonable functions for chip identification

AuthorsEiroa, S. ; Castro, Javier; Martínez-Rodríguez, Macarena Cristina; Tena, E. ; Brox, Piedad ; Baturone, I.
Issue Date2012
PublisherInstitute of Electrical and Electronics Engineers
Citation19th IEEE International Conference on Electronics, Circuits and Systems (ICECS): 392-395 (2012)
AbstractPhysical Unclonable functions (PUFs) have appeared as a promising solution to provide security in hardware. SRAM PUFs offer the advantage, over other PUF constructions, of reusing resources (memories) that already exist in many designs. However, their intrinsic noisy nature produces the so called bit flipping effect, which is a problem in circuit identification and secret key generation. The approaches reported to reduce this effect usually resort to the use of pre- and post-processing steps (such as Fuzzy Extractor structures combined with Error Correcting Codes), which increase the complexity of the system. This paper proposes a pre-processing step that reduces bit flipping problems without increasing the hardware complexity. The proposal has been verified experimentally with 90-nm SRAMs included in digital application specific integrated circuits (ASICs).
DescriptionComunicación presentada al "19th IEEE International Conference on Electronics, Circuits and Systems" celebrada en Sevilla (España) del 9 al 12 de Diciembre del 2012.
Publisher version (URL)http://dx.doi.org/10.1109/ICECS.2012.6463720
Identifiersdoi: 10.1109/ICECS.2012.6463720
isbn: 978-1-4673-1261-5
Appears in Collections:(IMSE-CNM) Libros y partes de libros
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