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dc.contributor.author | Barabino, Nicolás | - |
dc.contributor.author | Fiorelli, Rafaella | - |
dc.contributor.author | Silveira, Fernando | - |
dc.date.accessioned | 2013-10-17T11:14:04Z | - |
dc.date.available | 2013-10-17T11:14:04Z | - |
dc.date.issued | 2010 | - |
dc.identifier | doi: 10.1109/ISCAS.2010.5537207 | - |
dc.identifier | isbn: 978-1-4244-5308-5 | - |
dc.identifier.citation | Proceedings of IEEE International Symposium on Circuits and Systems: 2223-2226 (2010) | - |
dc.identifier.uri | http://hdl.handle.net/10261/84438 | - |
dc.description | Trabajo presentado al ISCAS celebrado en Paris del 30 de mayo al 2 de junio de 2010. | - |
dc.description.abstract | In this work a design flow for class C radiofrequency (RF) power amplifiers (PA) with on-chip output networks in nanometric technologies is presented. This is a new parasitic-aware method intended to reduce time-consuming iterations which are normally required in fully-integrated designs. Unlike other methods it is based on actual transistors DC characteristics and inductors data both extracted by simulation. Starting from the output power specifications a design space map is generated showing the trade-offs between efficiency and components sizing, thus enabling the selection of the most appropriate design that satisfies the harmonic distortion requirements. As a proof of concept of the proposed method, a design example for an IEEE 802.15.4 2.4 GHz PA in a 90 nm CMOS technology is presented. | - |
dc.description.sponsorship | The authors would like to thank the support of grant ANII BE POS 1250, Uruguayan projects PDT 69/08 and FCE 2007 501; and Catrene European project 2A105SR2 and Avanza I+D Spanish project TSI-020400-2008-71. | - |
dc.language.iso | eng | - |
dc.publisher | Institute of Electrical and Electronics Engineers | - |
dc.relation.isversionof | Postprint | - |
dc.rights | openAccess | - |
dc.title | Efficiency based design flow for fully-integrated class C RF power amplifiers in nanometric CMOS | - |
dc.type | comunicación de congreso | - |
dc.identifier.doi | 10.1109/ISCAS.2010.5537207 | - |
dc.relation.publisherversion | http://dx.doi.org/10.1109/ISCAS.2010.5537207 | - |
dc.date.updated | 2013-10-17T11:14:04Z | - |
dc.description.version | Peer Reviewed | - |
dc.type.coar | http://purl.org/coar/resource_type/c_5794 | es_ES |
item.cerifentitytype | Publications | - |
item.openairecristype | http://purl.org/coar/resource_type/c_18cf | - |
item.grantfulltext | open | - |
item.openairetype | comunicación de congreso | - |
item.fulltext | With Fulltext | - |
item.languageiso639-1 | en | - |
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Efficiency Based Design.pdf | 242,7 kB | Adobe PDF | Visualizar/Abrir |
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