Design of adaptive nano/CMOS neural architectures

Abstract

Memristive devices are a promising technology to implement dense learning synapse arrays emulating the high memory capacity and connectivity of biological brains. Recently, the implementation of STDP learning in memristive devices connected to spiking neurons have been demonstrated as well as the dependency of the form of the learning rule on the shape of the applied spike. In this paper, we propose a fully CMOS integrate-and-fire neuron generating a precisely shaped spike that can be tuned through programmable biases. The implementation of STDP learning is demonstrated through electrical simulations of a 4×4 array of memristors connected to 4 spiking neurons.