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Navegación por Autor Potestad-Ordoñez, Francisco E.
Mostrando resultados 1 a 6 de 6
| Derechos | Preview | Fecha Public. | Título | Autor(es) | Tipo |
| openAccess |  | 2022 | Design and evaluation of countermeasures against fault injection attacks and power side-channel leakage exploration for AES block cipher | Potestad-Ordoñez, Francisco E. CSIC ORCID; Tena-Sánchez, Erica CSIC ORCID; Acosta, Antonio J. CSIC ORCID; Jiménez Fernández, Carlos Jesús CSIC ORCID; Chaves, Ricardo | artículo |
| openAccess |  | 2021 | Experimental FIA Methodology Using Clock and Control Signal Modifications under Power Supply and Temperature Variations | Potestad-Ordoñez, Francisco E. CSIC ORCID; Tena-Sánchez, Erica CSIC ORCID; Mora-Gutiérrez, J. M. CSIC ORCID; Valencia-Barrero, M. CSIC ORCID; Jiménez-Fernández, Carlos J. | artículo |
| closedAccess |  | 2016 | Fault attack on FPGA implementations of Trivium stream cipher | Potestad-Ordoñez, Francisco E. CSIC ORCID; Jiménez Fernández, Carlos Jesús CSIC ORCID; Valencia-Barrero, M. CSIC ORCID | comunicación de congreso |
| openAccess |  | 2022 | Gate-level hardware countermeasure comparison against power analysis attacks | Tena-Sánchez, Erica CSIC ORCID; Potestad-Ordoñez, Francisco E. CSIC ORCID; Jiménez Fernández, Carlos Jesús CSIC ORCID; Acosta, Antonio J. CSIC ORCID; Chaves, Ricardo | artículo |
| openAccess |  | 2022 | Hardware countermeasures benchmarking against fault attacks | Potestad-Ordoñez, Francisco E. CSIC ORCID; Tena-Sánchez, Erica CSIC ORCID; Acosta, Antonio J. CSIC ORCID; Jiménez Fernández, Carlos Jesús CSIC ORCID; Chaves, Ricardo | artículo |
| closedAccess |  | 28-sep-2017 | Vulnerability analysis of trivium FPGA implementations | Potestad-Ordoñez, Francisco E. CSIC ORCID; Jiménez Fernández, Carlos Jesús CSIC ORCID; Valencia-Barrero, M. CSIC ORCID | artículo |
