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Título

VLSI implementations of threshold logic-a comprehensive survey

AutorBeiu, V.; Quintana, J. M. CSIC ORCID; Avedillo, María J. CSIC ORCID
Fecha de publicación2003
EditorInstitute of Electrical and Electronics Engineers
CitaciónIEEE Transactions on Neural Networks 14(5): 1217-1243 (2003)
ResumenThis paper is an in-depth review on silicon implementations of threshold logic gates that covers several decades. In this paper, we will mention early MOS threshold logic solutions and detail numerous very-large-scale integration (VLSI) implementations including capacitive (switched capacitor and floating gate with their variations), conductance/current (pseudo-nMOS and output-wired-inverters, including a plethora of solutions evolved from them), as well as many differential solutions. At the end, we will briefly mention other implementations, e.g., based on negative resistance devices and on single electron technologies.
URIhttp://hdl.handle.net/10261/85443
DOI10.1109/TNN.2003.816365
Identificadoresdoi: 10.1109/TNN.2003.816365
issn: 1045-9227
e-issn: 1941-0093
Aparece en las colecciones: (IMSE-CNM) Artículos




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