Formula approximation for flat and hierarchical symbolic analysis

Abstract

This paper addresses the topic of reducing the complexity of formulae resulting from the symbolic analysis of analog integrated circuits, covering both flat and hierarchical symbolic analysis approaches. Previously reported criteria for flat analysis are first briefly reviewed and their limitations illustrated via examples of practical analog circuits. In all of these criteria simplifications are performed by estimating the numerical values of the symbolic terms at a single point of the parameter space, corresponding to the expected typical values for symbols. Consequent quantitative as well as qualitative inaccuracies resulting from this approach are identified. A new simplification strategy for flat symbolic approaches is then presented in which insignificant terms are deleted taking into account expected ranges of variation in the symbol values. Examples are used to show that this new criterion overcomes the drawbacks encountered in previous ones. Finally, an algorithm to simplify hierarchical formulae is presented which includes consideration of the potential ranges of variation in the symbolic parameter values. This algorithm is also applied to practical analog integrated circuits.