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Título: | Device-level modeling and synthesis of high-performance pipeline ADCs |
Autor: | Ruiz Amaya, Jesús CSIC; Delgado-Restituto, Manuel CSIC ORCID; Rodríguez-Vázquez, Ángel CSIC ORCID | Fecha de publicación: | 2011 | Editor: | Springer Nature | Resumen: | This book presents models and procedures to design pipeline analog-to-digital converters, compensating for device inaccuracies, so that high-performance specs can be met within short design cycles. These models are capable of capturing and predicting the behavior of pipeline data converters within less than half-a-bit deviation, versus transistor-level simulations. As a result, far fewer model iterations are required across the design cycle. Models described in this book accurately predict transient behaviors, which are key to the performance of discrete-time systems and hence to the performance of pipeline data converters. | Versión del editor: | http://dx.doi.org/10.1007/978-1-4419-8846-1 | URI: | http://hdl.handle.net/10261/83136 | DOI: | 10.1007/978-1-4419-8846-1 | ISBN: | 978-1-4419-8845-4 |
Aparece en las colecciones: | (IMSE-CNM) Libros y partes de libros |
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