Supporting information Thermal Rectification and Thermal Logic Gates in Graded Alloy Semiconductors

Ng, Ryan C.; Castro-Álvarez, Alejandro; Sotomayor Torres, C. M.; Chávez-Angel, Emigdio

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Título:	Supporting information Thermal Rectification and Thermal Logic Gates in Graded Alloy Semiconductors
Autor:	Ng, Ryan C. CSIC ORCID; Castro-Álvarez, Alejandro; Sotomayor Torres, C. M. CSIC ORCID; Chávez-Angel, Emigdio CSIC ORCID
Fecha de publicación:	1-jul-2022
Editor:	Multidisciplinary Digital Publishing Institute
Citación:	Ng, Ryan C.; Castro-Álvarez, Alejandro; Sotomayor Torres, C. M.; Chávez-Angel, Emigdio; 2022; Supporting information Thermal Rectification and Thermal Logic Gates in Graded Alloy Semiconductors [Dataset]; Multidisciplinary Digital Publishing Institute; http://doi.org/10.3390/en15134685
Descripción:	4 pages. -- Table S1: Summary of COMSOL parameters. -- Table S2: Truth table for an AND-gate based on a pure Si slab. -- Table S3: Truth table for an AND-gate based on a pure Ge slab. -- Figure S1: Temperature and thermal conductivity distributions along a Si(1−x)Gex slab for different spatial atomic distributions. -- Figure S2: Thermal conductivity distributions in various alloy systems. -- Figure S3: Comparison of rectification in various alloy systems. -- Figure S4: Comparison of the effectiveness as x is varied.
Versión del editor:	http://doi.org/10.3390/en15134685
URI:	http://hdl.handle.net/10261/330341
DOI:	10.3390/en15134685
Referencias:	Ng, Ryan C.; Castro-Álvarez, Alejandro; Sotomayor Torres, C. M.; Chávez-Angel, Emigdio. Thermal Rectification and Thermal Logic Gates in Graded Alloy Semiconductors. http://doi.org/10.3390/en15134685. http://hdl.handle.net/10261/280767
Aparece en las colecciones:	(CIN2) Conjuntos de datos