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Load-independent characterization of trade-off fronts for operational amplifiers

AuthorsRoca, Elisenda ; Velasco-Jiménez, Manuel ; Castro-López, R. ; Fernández, Francisco V.
KeywordsPareto-optimal fronts
Hierarchical synthesis
Multi-objective optimization
Analog synthesis
Issue Date2010
CitationXXV Conference on Design of Circuits and Integrated Systems (2010)
AbstractIn emerging design methodologies for analog integrated circuits, the use of performance trade-off fronts, also known as Pareto fronts, is a keystone to overcome the limitations of the traditional top-down methodologies. However, most techniques reported so far to generate the front neglect the effect of the surrounding circuitry (such as the output load impedance) on the Pareto-front, thereby making it only valid for the context where the front was generated. This strongly limits its use in hierarchical analog synthesis because of the heavy dependence of key performances on the surrounding circuitry, but, more importantly, because this circuitry remains unknown until the synthesis process. We will address this problem by proposing a new technique to generate the trade-off fronts that is independent of the load that the circuit has to drive. This idea is exploited for a commonly used circuit, the operational amplifier, and experimental results show that this is a promising approach to solve the issue.
DescriptionTrabajo presentado al XXV DCIS celebrado en Lanzarote del 17 al 19 de noviembre de 2010.
Publisher version (URL)http://www.iuma.ulpgc.es/dcis2010/
Appears in Collections:(IMSE-CNM) Comunicaciones congresos
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