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A pareto-based systematic design technique for reconfigurable analog circuits using an evolutionary optimization algorithm

AuthorsVelasco-Jiménez, Manuel ; Castro-López, R. ; Roca, E.; Fernández, Francisco V.
KeywordsEvolutionary algorithm
Pareto-optimal front
Performance trade-off
Reconfigurable analog circuits
Issue Date2010
CitationXXV Conference on Design of Circuits and Integrated Systems (2010)
AbstractIn this paper, a technique to systematically design analog reconfigurable integrated circuits is presented. The methodology is based on a simulation-based optimization process that uses an evolutionary multi-objective algorithm. As it is well known, this kind of algorithms relies in the concept of Paretobased dominance. To cope with the complexity of reconfiguration in analog circuits, this concept is appropriately re-defined here with the notion of multi-mode Pareto-optimal fronts. The proposed solution is tested against a set of experiments to design a reconfigurable, fully-differential operational amplifier, whose performance trade-offs can be analyzed following the reported methodology. Moreover, some directions are given on the use of the resulting multi-mode Pareto-optimal fronts in a hierarchical synthesis methodology of reconfigurable analog circuits.
DescriptionTrabajo presentado al XXV DCIS celebrado en Lanzarote del 17 al 19 de noviembre de 2010.
Publisher version (URL)http://www.iuma.ulpgc.es/dcis2010/
Appears in Collections:(IMN-CNM) Comunicaciones congresos
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