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Low power LVDS transceiver for AER links with burst mode operation capability

AuthorsZamarreño-Ramos, Carlos ; Serrano-Gotarredona, Teresa ; Linares-Barranco, Bernabé
Issue Date2009
CitationXXIV Conference on Design of Circuits and Integrated Systems (2009)
AbstractThis paper presents the design and simulation of an LVDS transceiver intended to be used in serial AER links. Traditional implementations of LVDS serial interfaces require a continuous data flow between the transmitter and the receiver to keep the synchronization. However, the serial AER-LVDS interface proposed in [2] operates in a burst mode, having long times of silence without data transmission. This can be used to reduce the power consumption by switching off the LVDS circuitry during the pauses. Moreover, a fast recovery time after pauses must be achieved to not slow down the interface operation. The transceiver was designed in a 90 nm technology. Extensive simulations have been performed demonstrating a 1 Gbps data rate operation for all corners in post-layout simulations. Driver and receiver take up an area of 100x215 m2 and 100x140 m2 respectively.
DescriptionComunicación presentada al: "DCIS'09" celebrado en Zaragoza y organizado por la Universidad de Zaragoza (Unizar) del 18 al 20 de Noviembre del 2009.
Publisher version (URL)http://dcis2009.unizar.es/
Appears in Collections:(IMSE-CNM) Comunicaciones congresos
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