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Design of RTD-based NMIN/NMAX gates

AuthorsNúñez, Juan ; Quintana, J. M. ; Avedillo, M. J.
Issue Date2008
PublisherInstitute of Electrical and Electronics Engineers
Citation8th IEEE Conference on Nanotechnology: 518-521 (2008)
AbstractA novel implementation of NMIN/NMAX gates based on RTDs and transistors is presented. In this paper we will derive the relations that circuit representative parameters must verify to obtain a correct behaviour by means of the principles of the Monostable-to-Multistable Logic (MML). HSPICE simulations will be used to check our theoretical results.
DescriptionTrabajo presentado al 8th NANO celebrado en Arlington (USA) del 18 al 21 de agosto de 2008.
Publisher version (URL)http://dx.doi.org/10.1109/NANO.2008.155
Identifiersdoi: 10.1109/NANO.2008.155
isbn: 978-1-4244-2103-9
Appears in Collections:(IMSE-CNM) Libros y partes de libros
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