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Título: | Low-voltage CMOS subthreshold log-domain filtering |
Autor: | Serra-Graells, Francesc CSIC ORCID ; Huertas-Díaz, J. L. CSIC | Fecha de publicación: | 17-oct-2005 | Editor: | Institute of Electrical and Electronics Engineers | Citación: | IEEE Transactions on Circuits and Systems I: Regular Papers 52(10): 2090-2100 (2005) | Resumen: | This paper presents both a complete set of very low-voltage basic building blocks and a compact design methodology for log filtering in standard or even digital CMOS technologies. The new proposals are based on an alternative translinear loop principle for the MOSFET operating in its subthreshold region. Three different sets of complete basic building blocks are proposed along with all required auxiliary circuitry and a specific matrix design procedure to obtain stable and compact filter implementations. Also, all-MOS filter implementations following these circuit techniques are studied. Simulated and experimental examples are given at 1-V supply voltage for 1.2- and 0.35-μm CMOS technologies. The resulting circuit techniques are suitable to integrate very low-voltage low-power system-on-a-chip audio applications, such as hearing aids, in standard CMOS technologies. © 2005 IEEE. | Versión del editor: | http://doi.org/10.1109/TCSI.2005.853256 | URI: | http://hdl.handle.net/10261/85694 | DOI: | 10.1109/TCSI.2005.853256 | Identificadores: | issn: 1549-8328 |
Aparece en las colecciones: | (IMB-CNM) Artículos (IMSE-CNM) Artículos |
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