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dc.contributor.authorLinares-Barranco, Bernabé-
dc.contributor.authorSerrano-Gotarredona, Teresa-
dc.contributor.authorSerrano-Gotarredona, Rafael-
dc.identifierdoi: 10.1109/TNN.2003.816370-
dc.identifierissn: 1045-9227-
dc.identifiere-issn: 1941-0093-
dc.identifier.citationIEEE Transactions on Neural Networks 14(5): 1207-1216 (2003)-
dc.description.abstractThis paper considers the viability of compact low-resolution low-power mini digital-to-analog converters (mini-DACs) for use in large arrays of neural type cells, where programmable weights are required. Transistors are biased in weak inversion in order to yield small currents and low power consumptions, a necessity when building large size arrays. One important drawback of weak inversion operation is poor matching between transistors. The resulting effective precision of a fabricated array of 50 DACs turned out to be 47% (1.1 bits), due to transistor mismatch. However, it is possible to combine them two by two in order to build calibrated DACs, thus compensating for inter-DAC mismatch. It is shown experimentally that the precision can be improved easily by a factor of 10 (4.8% or 4.4 bits), which makes these DACs viable for low-resolution applications such as massive arrays of neural processing circuits. A design methodology is provided, and illustrated through examples, to obtain calibrated mini-DACs of a given target precision. As an example application, we show simulation results of using this technique to calibrate an array of digitally controlled integrate-and-fire neurons.-
dc.description.sponsorshipThis work was supported in part by Spanish Grants TIC1999-0446-C02-02, TIC2000-0406-P4-05 (VICTOR), FIT-07000/2002/921 (ARQUIMEDES), TIC2002-10878-E, and EU Grant IST-2001-34124 (CAVIAR).-
dc.publisherInstitute of Electrical and Electronics Engineers-
dc.titleCompact low-power calibration mini-DACs for neural arrays with programmable weights-
dc.description.versionPeer Reviewed-
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