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dc.contributor.authorGuerra, Oscar-
dc.contributor.authorDomínguez-Matas, Carlos-
dc.contributor.authorEscalera, Sara-
dc.contributor.authorGarcía-González, José Manuel-
dc.contributor.authorLiñán-Cembrano, G.-
dc.contributor.authorRío, Rocío del-
dc.contributor.authorDelgado-Restituto, Manuel-
dc.contributor.authorRodríguez-Vázquez, Ángel-
dc.date.accessioned2013-10-29T12:26:54Z-
dc.date.available2013-10-29T12:26:54Z-
dc.date.issued2003-
dc.identifierdoi: 10.1016/j.vlsi.2003.09.007-
dc.identifierissn: 0167-9260-
dc.identifier.citationIntegration, the VLSI Journal 36(4): 229-236 (2003)-
dc.identifier.urihttp://hdl.handle.net/10261/85271-
dc.description.abstractThis paper presents a CMOS 0.8 μm mixed-signal half-duplex Modem ASIC for data transmission on the low-voltage power line. It includes all the analog circuitry needed for input interfacing and modulation/demodulation (low-noise amplifier, PLL-based frequency synthesis, tunable filter banks, and decision circuitry), logic circuitry for control purposes, and an output amplifier used as front-end for an off-chip line driver. The chip demodulates signals down to 283μVrms (these are worst case values among 30 randomly-selected samples used as vehicles for detailed electrical characterization; most of the samples featured 200 μVrms sensitivity; bit error rate (BER) is below 0.5×10-5) at 10kbps, and operates correctly in the whole industrial temperature range, from -45°C to 80°C, under 5% variations of the 5V supply voltage. This ASIC is now in commercial production. © 2003 Elsevier B.V.-
dc.language.isoeng-
dc.publisherElsevier-
dc.rightsclosedAccess-
dc.titleA modem in CMOS technology for data communication on the low-voltage power line-
dc.typeartículo-
dc.identifier.doi10.1016/j.vlsi.2003.09.007-
dc.date.updated2013-10-29T12:26:54Z-
dc.description.versionPeer Reviewed-
Appears in Collections:(IMSE-CNM) Artículos
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