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A practical floating-gate Muller-C element using vMOS threshold gates

AuthorsRodríguez-Villegas, E. ; Huertas, Gloria ; Avedillo, M. J. ; Quintana, J. M. ; Rueda, Adoración
Issue Date2001
PublisherInstitute of Electrical and Electronics Engineers
CitationIEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 48(1): 102-106 (2001)
AbstractThis paper presents the rationale for vMOS-based realizations of digital circuits when logic design techniques based on threshold logic gates are used. Some practical problems in the vMOS implementation of threshold gates have been identified and solved. The feasibility and versatility of the proposed technique as well as its potential as a low-cost design technique for CMOS technologies have been shown by experimental results from a multiple-input Muller C-element. The proposed new realization exhibits better performance related to delay and area and power consumption than the traditional logic implementation.
DescriptionEl pdf del artículo es la versión de autor.
Publisher version (URL)http://dx.doi.org/10.1109/82.913193
Identifiersdoi: 10.1109/82.913193
issn: 1057-7130
Appears in Collections:(IMSE-CNM) Artículos
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