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A new five-parameter MOS transistor mismatch model

AuthorsSerrano-Gotarredona, Teresa ; Linares-Barranco, Bernabé
Issue Date2000
PublisherInstitute of Electrical and Electronics Engineers
CitationIEEE Electron Device Letters 21(1): 37-39 (2000)
AbstractA new five-parameter MOS transistor mismatch model is introduced capable of predicting transistor mismatch with very high accuracy for ohmic and saturation regions, including short-channel transistors. The new model is based on splitting the contribution of the mobility degradation parameter mismatch /spl Delta//spl theta/ into two components, and modulating them as the transistor transitions from ohmic to saturation regions. The model is tested for a wide range of transistor sizes (30), and shows excellent precision, never reported before for such a wide range of transistor sizes, including short-channel transistors.
Identifiersdoi: 10.1109/55.817445
issn: 0741-3106
Appears in Collections:(IMSE-CNM) Artículos
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