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A programmable imager for very high speed cellular signal processing

AuthorsRoca, Elisenda ; Espejo-Meana, S. ; Domínguez-Castro, R. ; Liñán-Cembrano, G. ; Rodríguez-Vázquez, Ángel
Issue Date1999
CitationJournal of VLSI Signal Processing 23(2-3): 305-318 (1999)
AbstractIn this paper a programmable imager with averaging will be described which is intended for averaging of different groups or sets of pixels formed by n×n kernels, n×m kernels or independent pixels of the array. This imager is a 64×64 array which uses passive pixels that can be randomly accessed. The read-out stage includes a sole charge amplifier with programmable gain, a sample-and-hold structure and an analog buffer. This readout structure is different from other existing imagers with variable resolution since it uses a sole charge amplifier, whereas the normal structure is an operational amplifier per column plus a global operational amplifier. This structure will be described in detail indicating the advantages and disadvantages with respect to other imagers with averaging capabilities. This programmable resolution architecture can be more appropriate, and eventually, more efficient, when implementing very high speed Cellular Neural Network (CNN) processors in a CNN chipset - a mixed-signal hardware platform for CNN-based image processing. A significant processing time reduction can be obtained when decreasing the image resolution, and therefore the amount of information to be transferred to the CNN processor. This programmable resolution can also be used for fast image recognition and ulterior windowing at full resolution in a reduced area of the image, permitting a more accurate processing of the region of interest. In addition, full resolution images can still be obtained, as in commercial imagers which are usually included in CNN chipsets.
Identifiersdoi: 10.1023/A:1008193018623
issn: 0922-5773
e-issn: 1573-109X
Appears in Collections:(IMSE-CNM) Artículos
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