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Título

An improved RNS generator 2n ± k based on threshold logic

AutorPettenghi, Héctor CSIC ORCID; Chaves, Ricardo; Sousa, Leonel; Avedillo, María J. CSIC ORCID
Fecha de publicación2010
EditorInstitute of Electrical and Electronics Engineers
Citación18th IEEE/IFIP VLSI System on Chip Conference (VLSI-SoC): 119-124 (2010)
ResumenThis paper presents a new scheme for designing residue generators using threshold logic. This approach is based on the periodicity of the series of powers of 2 taken modulo 2n ± k. In addition, a new algorithm is proposed to obtain a new set of partitions which are more advantageous in terms of area and delay for the presented topology. Experimental results in the analized range of k and n show that new proposed circuits using the novel partitioning are 70% faster and provide area savings of 64%, when compared with similar circuits using the partitioning methods presented to date.
DescripciónTrabajo presentado al 18th VLSI-Soc celebrado en Madrid del 27 al 29 de septiembre de 2010.
Versión del editorhttp://dx.doi.org/10.1109/VLSISOC.2010.5642611
URIhttp://hdl.handle.net/10261/84396
DOI10.1109/VLSISOC.2010.5642611
Identificadoresdoi: 10.1109/VLSISOC.2010.5642611
isbn: 978-1-4244-6469-2
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