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Title

Evaluation of RTD-CMOS logic gates

AuthorsNúñez, Juan ; Avedillo, M. J. ; Quintana, J. M.
Issue Date2010
PublisherInstitute of Electrical and Electronics Engineers
Citation13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD): 621-627 (2010)
AbstractThe incorporation of Resonant Tunnel Diodes (RTDs) into III/V transistor technologies has shown an improved circuit performance: higher circuit speed, reduced component count, and/or lowered power consumption. Currently, the incorporation of these devices into CMOS technologies (RTD-CMOS) is an area of active research. Although some works have focused the evaluation of the advantages of this incorporation, additional work in this direction is required. This paper compares RTD-CMOS and pure CMOS realizations of a set of logic gates which can be operated in a gate-level nanopipelined fashion, thus allows estimating logic networks operating frequency. Lower power-delay products are obtained for RTD/CMOS implementations.
DescriptionTrabajo presentado al 13th DSD celebrado en Lille del 1 al 3 de septiembre de 2010.
Publisher version (URL)http://dx.doi.org/10.1109/DSD.2010.17
URIhttp://hdl.handle.net/10261/84019
DOI10.1109/DSD.2010.17
Identifiersdoi: 10.1109/DSD.2010.17
isbn: 978-1-4244-7839-2
Appears in Collections:(IMSE-CNM) Libros y partes de libros
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