A comparative study of biasing circuits for an inductorless wideband Low Noise Amplifier

Abstract

In this paper we present a comparative study of different biasing versions of an inductorless low-area Low Noise Amplifier (LNA). With this study, we intend to determine the most suitable biasing circuit to achieve the best LNA performance. The LNAs under study are simulated in two different CMOS processes, 130 nm and 90 nm. The supply voltage is 1.2 V. The best LNA implemented in 130 nm achieves a bandwidth of 2.94 GHz with a flat voltage gain (Av) of 16.5 dB and a power consumption of 3.2 mW. The same LNA topology implemented in 90 nm technology has a bandwidth of 11.2 GHz, voltage gain of 16.6 dB and consumes 1.9 mW. Both LNAs have input impedance matching and have a noise figure below 2.4 dB at 2.4 GHz.