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Título: | A template router |
Autor: | Unutulmaz, A.; Dundar, Gunhan; Fernández, Francisco V. CSIC ORCID | Fecha de publicación: | 2011 | Editor: | Institute of Electrical and Electronics Engineers | Citación: | 20th European Conference on Circuit Theory and Design (ECCTD): 334-337 (2011) | Resumen: | Automatic synthesis of analog circuits is being extensively studied and layout parasitics are increasingly being considered in the design loop. Layouts are built either through optimization or by instancing a template. In a circuit synthesis loop, the first approach is very expensive in terms of time complexity and the second one may lead low quality layouts. A better methodology will be to combine these approaches. However, a new type of router is required for such a combination; namely, the template router. This paper presents a template router and discusses how routing is coded and how this code is generated using the well known A* Algorithm. | URI: | http://hdl.handle.net/10261/83808 | DOI: | 10.1109/ECCTD.2011.6043354 | Identificadores: | doi: 10.1109/ECCTD.2011.6043354 isbn: 978-1-4577-0617-2 |
Aparece en las colecciones: | (IMSE-CNM) Libros y partes de libros |
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accesoRestringido.pdf | 15,38 kB | Adobe PDF | Visualizar/Abrir |
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