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Título: | Two-phase RTD-CMOS pipelined circuits |
Autor: | Núñez, Juan CSIC ORCID ; Avedillo, María J. CSIC ORCID; Quintana, J. M. CSIC ORCID | Fecha de publicación: | 2012 | Editor: | Institute of Electrical and Electronics Engineers | Citación: | IEEE Transactions on Nanotechnology 11(6): 1063-1066 (2012) | Resumen: | MOnostable-BIstable Logic Element (MOBILE) networks can be operated in a gate-level pipelined fashion (nanopipeline) allowing high through output. Resonant tunneling diode (RTD)-based MOBILE nanopipelined circuits have been reported using different clock schemes including a four-phase strategy and a single-phase clock scheme. In particular, significant power advantages of single-phase RTD-CMOS MOBILE circuits over pure CMOS have been shown. This letter compares the RTD-CMOS realizations using a single clock and a novel two-phase clock solution. Significant superior robustness and performance in terms of power and area are obtained for the two-phase implementations. © 2012 IEEE. | Descripción: | El pdf del artículo es la versión post-print. | Versión del editor: | http://dx.doi.org/10.1109/TNANO.2012.2213839 | URI: | http://hdl.handle.net/10261/83667 | DOI: | 10.1109/TNANO.2012.2213839 | Identificadores: | doi: 10.1109/TNANO.2012.2213839 issn: 1536-125X e-issn: 1941-0085 |
Aparece en las colecciones: | (IMSE-CNM) Artículos |
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two-phase.pdf | 190,55 kB | Adobe PDF | Visualizar/Abrir |
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