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dc.contributor.authorSerra-Graells, Francesc-
dc.contributor.authorHuertas-Díaz, J. L.-
dc.date.accessioned2012-07-02T11:29:58Z-
dc.date.available2012-07-02T11:29:58Z-
dc.date.issued2003-03-
dc.identifier.citationAnalog Integrated Circuits and Signal Processing 34(3): 183-187 (2003)-
dc.identifier.issn0925-1030-
dc.identifier.urihttp://hdl.handle.net/10261/52639-
dc.description.abstractA new CMOS circuit strategy for very low-voltage Pulse-Duration Modulators (PDM) is proposed. Optimization of voltage supply scaling below the sum of threshold voltages is based on Instantaneous Log Companding processing through the MOSFET operating in weak inversion. A 1 V VLSI PDM circuit for very low-voltage audio applications such as Hearing Aids is presented, showing good agreement between simulated and experimental data.-
dc.description.sponsorshipResearch partially supported by Spanish CICYT-TIC97-1159, CICYT-TIC99-1084 and European ESPRIT-FUSE-23068 projects.-
dc.language.isoeng-
dc.publisherSpringer-
dc.relation.isversionofPostprint-
dc.rightsopenAccess-
dc.subjectLow voltage-
dc.subjectCMOS-
dc.subjectSubthreshold-
dc.subjectLog-
dc.subjectPDM-
dc.title1 V CMOS subthreshold log domain PDM-
dc.typeartículo-
dc.identifier.doihttp://dx.doi.org/10.1023/A:1022545414777-
dc.relation.publisherversionhttp://dx.doi.org/10.1023/A:1022545414777-
dc.identifier.e-issn1573-1979-
dc.date.updated2012-07-02T11:29:58Z-
dc.description.versionPeer Reviewed-
dc.contributor.funderComisión Interministerial de Ciencia y Tecnología, CICYT (España)-
dc.contributor.funderEuropean Commission-
dc.relation.csic-
dc.identifier.funderhttp://dx.doi.org/10.13039/501100007273es_ES
dc.identifier.funderhttp://dx.doi.org/10.13039/501100000780es_ES
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