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Título

Simulation-based High-level Synthesis of Pipeline Analog-to-Digital Converters

Autor Ruiz Amaya, Jesús; Rosa, José M. de la ; Delgado-Restituto, Manuel
Palabras clave Pipeline Analog-to-Digital Converters
High-level Synthesis
Fecha de publicación nov-2004
Citación J. Ruiz-Amaya, J.M. de la Rosa and M. Delgado-Restituto: "Simulation-based High-level Synthesis of Pipeline Analog-to-Digital Converters", Proceeding of the 2004 Conference on Design of Circuits and Integrated Systems, pp. 39-44, Bordeaux, November 2004.
ResumenThis paper presents a toolbox for the time-domain simulation and optimization-based high-level synthesis of pipeline analog-to-digital converters in MATLAB®. Behavioral models of building blocks, including their critical error mechanisms, are described and incorporated into SIMULINK® as C-compiled S-functions. This approach significantly speeds up system-level simulations while keeping high accuracy −verified with HSPICE− and interoperability of different subcircuit models. Moreover, their combined use with an efficient optimizer makes the proposed toolbox a valuable alternative for the design of broadband communication analog front-ends. As a case study, an embedded 0.13μm CMOS 12bit@80MS/s ADC for a PLC chipset is designed to show the capabilities of the presented tool.
URI http://hdl.handle.net/10261/3843
ISBN 2-9522971-0-X
Aparece en las colecciones: (IMS-CNM) Comunicaciones congresos
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