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RightsPreviewIssue DateTitleAuthor(s)Type
1closedAccessaccesoRestringido.pdf.jpg1998Electrooptical measurement system for the DC characterization of visible detectors for CMOS-compatible vision chipsRoca, Elisenda ; Frutos, F.; Espejo-Meana, S. ; Domínguez-Castro, R. ; Rodríguez-Vázquez, Ángel artículo
2openAccessMacromodeling.pdf.jpg2005Macromodelling for analog design and robustness boosting in bio-inspired computing modelsCuadri, J. ; Liñán-Cembrano, G.  ; Roca, Elisenda ; Rodríguez-Vázquez, Ángel artículo
3closedAccessaccesoRestringido.pdf.jpg1999A programmable imager for very high speed cellular signal processingRoca, Elisenda ; Espejo-Meana, S. ; Domínguez-Castro, R. ; Liñán-Cembrano, G.  ; Rodríguez-Vázquez, Ángel artículo
4openAccesscontext_dependent (2).pdf.jpgOct-2012Context-dependent transformation of Pareto-optimal performance fronts of operational amplifiersRoca, Elisenda ; Velasco-Jiménez, Manuel ; Castro-López, R. ; Fernández, Francisco V. artículo
5closedAccessaccesoRestringido.pdf.jpg2002Approximate symbolic analysis of hierachically decomposed analog circuitsGuerra, Oscar ; Roca, Elisenda ; Fernández, Francisco V. ; Rodríguez-Vázquez, Ángel artículo
6closedAccessaccesoRestringido.pdf.jpg2009A memetic approach to the automatic design of high-performance analog integrated circuitsLiu, Bo; Fernández, Francisco V. ; Gielen, Georges; Castro-López, R. ; Roca, Elisenda artículo
7closedAccessaccesoRestringido.pdf.jpg1999MOST-based design and scaling of synaptic interconnections in VLSI analog array processing CNN chipsRodríguez-Vázquez, Ángel ; Roca, Elisenda ; Delgado-Restituto, Manuel ; Espejo-Meana, S. ; Domínguez-Castro, R. artículo
8openAccessACE16K.pdf.jpg2004ACE16K: The Third Generation of Mixed-Signal SIMD-CNN ACE Chips Toward VSoCsRodríguez-Vázquez, Ángel ; Liñán-Cembrano, G.  ; Carranza-González, L. ; Roca, Elisenda ; Carmona-Galán, R. ; Jiménez-Garrido, Francisco; Domínguez-Castro, R. ; Espejo-Meana, S. artículo
9openAccessIntro_RFIC_final.pdf.jpg2016Introduction to the special issue on Radio Frequency Integrated Circuits (RFIC) design techniquesRoca, Elisenda ; Sieiro, J.artículo
10embargoedAccessMEE_DIGITAL_CSIC.pdf.jpg2019A detailed study of the gate/drain voltage dependence of RTN in bulk pMOS transistorsSaraza-Canflanca, P.; Martin-Martinez, J.; Castro-López, R. ; Roca, Elisenda ; Rodríguez, R.; Nafria, Montserrat; Fernández, Francisco V. artículo
11openAccessSOCO_Passos_FINAL.pdf.jpg2019A two-step surrogate modeling strategy for single-objective and multi-objective optimization of radiofrequency circuitsPassos, F.; González-Echevarria, R.; Roca, Elisenda ; Castro-López, R. ; Fernández, Francisco V. artículo
12embargoedAccessSSE_2019.pdf.jpg2019A smart noise- and RTN-removal method for parameter extraction of CMOS aging compact modelsDíaz-Fortuny, Javier; Martín-Martínez, Javier; Rodriguez, Rosana; Castro-López, R. ; Roca, Elisenda ; Fernández, Francisco V. ; Nafria, Montserratartículo
13closedAccessaccesoRestringido.pdf.jpgSep-2016Reliability simulation for analog ICs: Goals, solutions, and challengesToro-Frias, A. ; Martín-Lloret, P.; Martin-Martinez, J.; Castro-López, R. ; Roca, Elisenda ; Rodriguez, R.; Nafria, M.; Fernández, Francisco V. artículo
14openAccessFirst_online.pdf.jpg2019Two-Step RF IC Block Synthesis With Preoptimized Inductors and Full Layout Generation In-the-LoopMartins, Ricardo; Lourenço, Nuno; Passos, Fábio; Póvoa, Ricardo; Canelas, Antonio; Roca, Elisenda ; Castro-López, R. ; Sieiro, Javier; Fernández, Francisco V. ; Horta, Nunoartículo
15openAccessSystematic design.pdf.jpg2008Systematic design of high-resolution high-frequency cascade continuous-time sigma-delta modulatorsTortosa, Ramón ; Castro-López, R. ; Rosa, José M. de la ; Roca, Elisenda ; Rodríguez-Vázquez, Ángel ; Fernández, Francisco V. artículo
16closedAccessaccesoRestringido.pdf.jpg2009Integrated circuitry to detect slippage inspired by human skin and artificial retinasMaldonado-López, Rocío ; Vidal Verdú, Fernando; Liñán-Cembrano, G.  ; Roca, Elisenda ; Rodríguez-Vázquez, Ángel artículo
17closedAccessaccesoRestringido.pdf.jpg2009Multimode Pareto fronts for design of reconfigurable analogue circuitsCastro-López, R. ; Roca, Elisenda ; Fernández, Francisco V. artículo
18closedAccessaccesoRestringido.pdf.jpg1999Error control in simplification before generation algorithms for symbolic analysis of large analogue circuitsRodriguez-Garcia, J. D.; Guerra, Oscar ; Roca, Elisenda ; Fernández, Francisco V. ; Rodríguez-Vázquez, Ángel artículo
19openAccessSMACD 2012.pdf.jpg2014Introduction to the special issue on SMACD 2012Fernández, Francisco V. ; Roca, Elisenda ; Castro-López, R. artículo
20closedAccessaccesoRestringido.pdf.jpg2008An integrated layout-synthesis approach for analog ICsCastro-López, R. ; Guerra, Oscar ; Roca, Elisenda ; Fernández, Francisco V. artículo
21closedAccessaccesoRestringido.pdf.jpg2007Early slip detection with a tactile sensor based on retinaMaldonado-López, Rocío ; Vidal Verdú, Fernando; Liñán-Cembrano, G.  ; Roca, Elisenda ; Rodríguez-Vázquez, Ángel artículo
22openAccessSurrindsynthesis_asc_revisedv4.pdf.jpg2017Radio-Frequency Inductor Synthesis Using Evolutionary Computation and Gaussian-Process Surrogate ModelingPassos, F.; Roca, Elisenda ; Castro-López, R. ; Fernández, Francisco V. artículo
23openAccessIntegrationVLSI_side-o_v15.doc.pdf.jpg2017An inductor modeling and optimization toolbox for RF circuit designPassos, F.; Roca, Elisenda ; Castro-López, R. ; Fernández, Francisco V. artículo
24openAccessMOTL_v6_FINAL.pdf.jpg2017Parametric macromodeling of integrated inductors for RF circuit designPassos, F.; Ye, Y.; Spina, D.; Roca, Elisenda ; Castro-López, R. ; Dhaene, T.; Fernández, Francisco V. artículo
25openAccessFinalVersion_Submitted_VLSI2018.pdf.jpgAug-2018A comparison of automated RF circuit design methodologies: online vs. offline passive component designPassos, F.; Roca, Elisenda ; Castro-López, R. ; Fernández, Francisco V. artículo
26openAccessFINAL VERSION JSSC.pdf.jpgDec-2018A Versatile CMOS Transistor Array IC for the Statistical Characterization of Time-Zero Variability, RTN, BTI, and HCIDíaz-Fortuny, Javier; Martín-Martínez, Javier; Rodríguez, Rosana; Castro-López, R. ; Roca, Elisenda ; Aragonés, Xavier; Barajas, Enrique; Mateo, Diego; Fernández, Francisco V. ; Nafria, Montserratartículo
27openAccessIntegration_Ahyoune_Lastsubmission.pdf.jpg2018Quasi-static PEEC planar solver using a weighted combination of 2D and 3D analytical Green's functions and a predictive meshing generatorAhioune, Sayid; Sieiro, Javier; Carrasco, Tomás; Vidal, Neus; López-Villegas, J.M.; Roca, Elisenda ; Fernández, Francisco V. artículo
28embargoedAccessArticle_VLSI_1672_Complete.pdf.jpg2020A Robust and Automated Methodology for the Analysis of Time-Dependent Variability at Transistor LevelSaraza-Canflanca, P.; Díaz-Fortuny, J.; Castro-López, R. ; Roca, Elisenda ; Martín-Martínez, J.; Rodríguez, R.; Nafria, M.; Fernández, Francisco V. artículo
29openAccessIntegration_Passos_FINAL.pdf.jpgFeb-2018Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodologyPassos, F.; Martins, R.; Lourenço, N.; Roca, Elisenda ; Póvoa, R.; Canelas, A.; Castro-López, R. ; Horta, N.; Fernández, Francisco V. artículo
30openAccessREDUCED_SIZED.pdf.jpg2017An automated design methodology of RF circuits by using pareto-optimal fronts of EM-simulated inductorsGonzález-Echevarría, R.; Roca, Elisenda ; Castro-López, R. ; Fernández, Francisco V. ; Sieiro, J.; López-Villegas, J. M.; Vidal, Neusartículo
31closedAccessSynthesis_of_inductors_final_OK.pdf.jpg2014Automated generation of the optimal performance trade-offs of integrated inductorsGonzalez-Echevarria, R.; Castro-López, R. ; Roca, Elisenda ; Fernández, Francisco V. ; Sieiro, J.; Vidal, Neus; Lopez-Villegas, J. M.artículo
32openAccessMIXED-MODE.pdf.jpg2012Mixed-mode impedance and reflection coefficient of two-port devicesCarrasco, T.; Sieiro, J.; Lopez-Villegas, J. M.; Vidal, Neus; Gonzalez-Echevarria, R.; Roca, Elisenda artículo
33openAccess08599047.pdf.jpg2020A Multilevel Bottom-up Optimization Methodology for the Automated Synthesis of RF SystemsPassos, F.; Roca, Elisenda ; Sieiro, Javier; Fiorelli, Rafaella; Castro-López, R. ; López-Villegas, J.M.; Fernández, Francisco V. artículo
34openAccess09032117.pdf.jpg2020Ready-to-Fabricate RF Circuit Synthesis Using a Layout- and Variability-Aware Optimization-Based MethodologyPassos, F.; Roca, Elisenda ; Martins, Ricardo; Lourenço, Nuno; Ahyoune, Saiyd; Sieiro, Javier; Castro-López, R. ; Horta, Nuno; Fernández, Francisco V. artículo
35openAccessTIM2019.pdf.jpg2020Flexible Setup for the Measurement of CMOS Timedependent Variability with Array-based Integrated CircuitsDíaz-Fortuny, Javier; Saraza-Caflanca, Pablo; Castro-López, Rafael; Roca, Elisenda ; Martín-Martínez, Javier; Rodríguez, Rosana; Fernández, Francisco V. ; Nafria, Montserratartículo
Results 1-35 of 35 (Search time: 1.243 seconds).
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