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Título: | A Compact Switched-Capacitor Multi-Bit Quantizer for Low-Power High-Resolution Delta-Sigma ADCs |
Autor: | Cisneros-Fernández, J.; Serra-Graells, Francesc CSIC ORCID ; Terés, Lluís; Dei, Michele | Palabras clave: | Modulation, Quantization (signal), Power demand, Capacitors, Integrated circuit modeling, Switches, Dynamic range | Fecha de publicación: | 27-may-2018 | Editor: | Institute of Electrical and Electronics Engineers | Resumen: | This paper proposes a compact switched-capacitor (SC) multi-bit flash quantizer for low-power high-resolution delta-sigma modulators (ΔΣMs). First, a general power model for single-loop ΔΣMs is presented to show the importance of using multi-bit quantization when facing high-resolution specifications. In this context, a SC multi-bit quantizer circuit is proposed, which exhibits low-power operation, high modularity, single comparator design and compatibility with both multi-feedforward ΔΣM architectures and other SC low-power circuit techniques, like clocked comparators and switched OpAmps. A practical 50-kHz 16-bit ΔΣM design case is also presented. | Versión del editor: | 10.1109/ISCAS.2018.8351335 | URI: | http://hdl.handle.net/10261/262625 | DOI: | 10.1109/ISCAS.2018.8351335 | ISSN: | 2590-0072 | Identificadores: | doi: 10.1109/ISCAS.2018.8351335 url: https://ieeexplore.ieee.org/document/8351335/keywords#keywords issn: 2379-447X |
Aparece en las colecciones: | (IMB-CNM) Comunicaciones congresos |
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iscas18.pdf | 876,73 kB | Adobe PDF | Visualizar/Abrir |
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