English   español  
Por favor, use este identificador para citar o enlazar a este item: http://hdl.handle.net/10261/134403
Compartir / Impacto:
Estadísticas
Add this article to your Mendeley library MendeleyBASE
Visualizar otros formatos: MARC | Dublin Core | RDF | ORE | MODS | METS | DIDL
Título

CPU accounting for multicore processors

AutorLuque, Carlos; Moreto, Miquel; Cazorla, Francisco J.; Gioiosa, Roberto; Buyuktosunoglu, Alper; Valero, Mateo
Palabras claveShared last level of cache
CPU accounting
Chip-multiprocessor
Cache partitioning algorithms
Multiprocessing systems
Fecha de publicación2012
EditorInstitute of Electrical and Electronics Engineers
CitaciónIEEE Transactions on Computers 61 (2): 251- 264 (2012)
ResumenIn single-threaded processors and Symmetric Multiprocessors the execution time of a task depends on the other tasks it runs with (the workload), since the Operating System (OS) time shares the CPU(s) between tasks in the workload. However, the time accounted to a task is roughly the same regardless of the workload in which the task runs in, since the OS takes into account those periods in which the task is not scheduled onto a CPU. Chip Multiprocessors (CMPs) introduce complexities when accounting CPU utilization, since the CPU time to account to a task not only depends on the time that the task is scheduled onto a CPU, but also on the amount of hardware resources it receives during that period. And given that in a CMP hardware resources are dynamically shared between tasks, the CPU time accounted to a task in a CMP depends on the workload it executes in. This is undesirable because the same task with the same input data set may be accounted differently depending on the workload it executes. In this paper, we identify how an inaccurate measurement of the CPU utilization affects several key aspects of the system such as OS statistics or the charging mechanism in data centers. We propose a new hardware CPU accounting mechanism to improve the accuracy when measuring the CPU utilization in CMPs and compare it with the previous accounting mechanisms. Our results show that currently known mechanisms lead to a 16 percent average error when it comes to CPU utilization accounting. Our proposal reduces this error to less than 2.8 percent in a modeled 8-core processor system. © 2006 IEEE.
URIhttp://hdl.handle.net/10261/134403
DOI10.1109/TC.2011.152
Identificadoresdoi: 10.1109/TC.2011.152
issn: 0018-9340
Aparece en las colecciones: (IIIA) Artículos
Ficheros en este ítem:
Fichero Descripción Tamaño Formato  
accesoRestringido.pdf15,38 kBAdobe PDFVista previa
Visualizar/Abrir
Mostrar el registro completo
 

Artículos relacionados:


NOTA: Los ítems de Digital.CSIC están protegidos por copyright, con todos los derechos reservados, a menos que se indique lo contrario.