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Title

Digital Implementation of a Single Dynamical Node Reservoir Computer

AuthorsAlomar, Miquel L.; Soriano, Miguel C. ; Escalona-Morán, M. ; Canals, Vicent; Fischer, Ingo ; Mirasso, Claudio R. ; Rosselló, José L.
Issue Date2015
PublisherInstitute of Electrical and Electronics Engineers
CitationIEEE Transactions on Circuits and Systems II: Express Briefs 62(10): 977-981 (2015)
Abstract© 2015 IEEE. Minimal hardware implementations of machine-learning techniques have been attracting increasing interest over the last decades. In particular, field-programmable gate array (FPGA) implementations of neural networks (NNs) are among the most appealing ones, given the match between system requirements and FPGA properties, namely, parallelism and adaptation. Here, we present an FPGA implementation of a conceptually simplified version of a recurrent NN based on a single dynamical node subject to delayed feedback. We show that this configuration is capable of successfully performing simple real-time temporal pattern classification and chaotic time-series prediction.
Publisher version (URL)http://dx.doi.org/10.1109/TCSII.2015.2458071
URIhttp://hdl.handle.net/10261/133730
DOI10.1109/TCSII.2015.2458071
Identifiersissn: 1549-7747
Appears in Collections:(IFISC) Artículos
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