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Título

Low-Power Differential Logic Gates for DPA Resistant Circuits

AutorTena-Sánchez, Erica; Castro, Javier; Acosta, Antonio José
Fecha de publicación2014
EditorInstitute of Electrical and Electronics Engineers
Citación17th Euromicro Conference on Digital System Design (DSD), 671-674 (2014)
ResumenInformation leakaged by cryptosistems can be used by third parties to reveal critical information using Side Channel Attacks (SCAs). Differential Power Analysis (DPA) is a SCA that uses the power consumption dependence on the processed data. Designers widely use differential logic styles with constant power consumption to protect devices against DPA. However, the right use of such circuits needs a fully symmetric structure and layout, and to remove any memory effect that could leak information. In this paper we propose improved low-power gates that provide excellent results against DPA attacks. Simulation-based DPA attacks on Sbox9 are used to validate the effectiveness of the proposals.
DescripciónComunicación presentada en el 17th Euromicro Conference on Digital System Design (DSD), celebrado en Verona (Italia) del 27 al 29 de Agosto de 2014
Versión del editorhttp://dx.doi.org/10.1109/DSD.2014.72
URIhttp://hdl.handle.net/10261/121617
DOI10.1109/DSD.2014.72
Aparece en las colecciones: (IMSE-CNM) Comunicaciones congresos
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