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Título

Power and Area Efficient Comb-Based Decimator for Sigma-Delta ADCs with High Decimation Factors

Autor Molina-Salgado, G.; Jovanovic-Dolecek, G.; Rosa, José M. de la
Fecha de publicación 2013
EditorInstitute of Electrical and Electronics Engineers
Citación IEEE International Symposium on Circuits and Systems (ISCAS): 1260-1263 (2013)
ResumenThis paper introduces a power and area efficient comb-based decimation structure, particularly suited for high values of decimation factors which are a power of two. The proposed topology has two stages, where the first stage is in a non-recursive form and the second one is in a recursive form (CIC filter). Moreover, a slight modification of the proposed decimator structure is presented in order to obtain an improved alias rejection. Simulation results are shown to validate the proposed approach.
URI http://hdl.handle.net/10261/107823
Aparece en las colecciones: (IMSE-CNM) Comunicaciones congresos
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