2024-03-29T14:50:30Zhttp://digital.csic.es/dspace-oai/requestoai:digital.csic.es:10261/849922020-07-03T10:43:20Zcom_10261_90com_10261_4col_10261_343
AER image filtering architecture for vision-processing systems
Serrano-Gotarredona, Teresa
Andreou, A. G.
Linares-Barranco, Bernabé
A VLSI architecture is proposed for the realization of real-time two-dimensional (2-D) image filtering in an address-event-representation (AER) vision system. The architecture is capable of implementing any convolutional kernel F(x,y) as long as it is decomposable into x-axis and y-axis components, i.e., F(x, y) = H(x)V(y), for some rotated coordinate system {x, y} and if this product can be approximated safely by a signed minimum operation. The proposed architecture is intended to be used in a complete vision system, known as the boundary contour system and feature contour system (BCS-FCS) vision model, proposed by Grossberg and collaborators. The present paper proposes the architecture, provides a circuit implementation using MOS transistors operated in weak inversion, and shows behavioral simulation results at the system level operation and some electrical simulations.
2013-10-25T09:39:32Z
2013-10-25T09:39:32Z
1999
2013-10-25T09:39:32Z
artĂculo
IEEE Transactions on Circuits and Systems I - Fundamental Theory and Applications 46(9): 1064-1071 (1999)
http://hdl.handle.net/10261/84992
10.1109/81.788808
eng
http://dx.doi.org/10.1109/81.788808
openAccess
Institute of Electrical and Electronics Engineers