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Browsing by Author Roca, Elisenda

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RightsPreviewIssue DateTitleAuthor(s)Type
closedAccessaccesoRestringido.pdf.jpg2010A bottom-up approach to the systematic design of LNAs using evolutionary optimizationSánchez-López, Carlos ; Castro-López, R. ; Roca, Elisenda ; Fernández, Francisco V. ; Gonzalez-Echevarria, R.; Esteban-Muller, J. ; Lopez-Villegas, J. M.; Sieiro, J.; Vidal, Neuscomunicación de congreso
openAccessFinalVersion_Submitted_VLSI2018.pdf.jpgAug-2018A comparison of automated RF circuit design methodologies: online vs. offline passive component designPassos, F.; Roca, Elisenda ; Castro-López, R. ; Fernández, Francisco V. artículo
embargoedAccessMEE_DIGITAL_CSIC.pdf.jpg2019A detailed study of the gate/drain voltage dependence of RTN in bulk pMOS transistorsSaraza-Canflanca, P.; Martin-Martinez, J.; Castro-López, R. ; Roca, Elisenda ; Rodríguez, R.; Nafria, Montserrat; Fernández, Francisco V. artículo
closedAccessaccesoRestringido.pdf.jpg2009A focal plane processor for continuous-time 1-D optical correlation applicationsLiñán-Cembrano, G.  ; Carranza-González, L. ; Alexandre, B. ; Roca, Elisenda ; Rodríguez-Vázquez, Ángel comunicación de congreso
openAccess2010A FPP-oriented tone mapping technique for high dynamic range imagers using temporal and final exposure measurementsVargas-Sierra, S. ; Liñán-Cembrano, G.  ; Roca, Elisenda ; Rodríguez-Vázquez, Ángel comunicación de congreso
closedAccessaccesoRestringido.pdf.jpg2009A memetic approach to the automatic design of high-performance analog integrated circuitsLiu, Bo; Fernández, Francisco V. ; Gielen, Georges; Castro-López, R. ; Roca, Elisenda artículo
openAccess08599047.pdf.jpg2020A Multilevel Bottom-up Optimization Methodology for the Automated Synthesis of RF SystemsPassos, F.; Roca, Elisenda ; Sieiro, Javier; Fiorelli, Rafaella; Castro-López, R. ; López-Villegas, J.M.; Fernández, Francisco V. artículo
closedAccessaccesoRestringido.pdf.jpg1999A programmable imager for very high speed cellular signal processingRoca, Elisenda ; Espejo-Meana, S. ; Domínguez-Castro, R. ; Liñán-Cembrano, G.  ; Rodríguez-Vázquez, Ángel artículo
embargoedAccessArticle_VLSI_1672_Complete.pdf.jpg2020A Robust and Automated Methodology for the Analysis of Time-Dependent Variability at Transistor LevelSaraza-Canflanca, P.; Díaz-Fortuny, J.; Castro-López, R. ; Roca, Elisenda ; Martín-Martínez, J.; Rodríguez, R.; Nafria, M.; Fernández, Francisco V. artículo
closedAccessaccesoRestringido.pdf.jpg1998A simplification before and during generation methodology for symbolic large-circuit analysisGuerra, Oscar ; Rodriguez-Garcia, J. D.; Roca, Elisenda ; Fernández, Francisco V. ; Rodríguez-Vázquez, Ángel comunicación de congreso
closedAccessaccesoRestringido.pdf.jpg2017A size-adaptive time-step algorithm for accurate simulation of aging in analog ICsMartín-Lloret, P.; Toro-Frias, A. ; Martin-Martinez, J.; Castro-López, R. ; Roca, Elisenda ; Rodriguez, R.; Nafria, M.; Fernández, Francisco V. comunicación de congreso
embargoedAccessSSE_2019.pdf.jpg2019A smart noise- and RTN-removal method for parameter extraction of CMOS aging compact modelsDíaz-Fortuny, Javier; Martín-Martínez, Javier; Rodriguez, Rosana; Castro-López, R. ; Roca, Elisenda ; Fernández, Francisco V. ; Nafria, Montserratartículo
openAccessSOCO_Passos_FINAL.pdf.jpg2019A two-step surrogate modeling strategy for single-objective and multi-objective optimization of radiofrequency circuitsPassos, F.; González-Echevarria, R.; Roca, Elisenda ; Castro-López, R. ; Fernández, Francisco V. artículo
openAccessFINAL VERSION JSSC.pdf.jpgDec-2018A Versatile CMOS Transistor Array IC for the Statistical Characterization of Time-Zero Variability, RTN, BTI, and HCIDíaz-Fortuny, Javier; Martín-Martínez, Javier; Rodríguez, Rosana; Castro-López, R. ; Roca, Elisenda ; Aragonés, Xavier; Barajas, Enrique; Mateo, Diego; Fernández, Francisco V. ; Nafria, Montserratartículo
closedAccessaccesoRestringido.pdf.jpg2013A Wideband Lumped-Element Model for Arbitrarily Shaped Integrated InductorsPassos, F.; Fino, M.H.; Roca, Elisenda comunicación de congreso
openAccessACE16K.pdf.jpg2004ACE16K: The Third Generation of Mixed-Signal SIMD-CNN ACE Chips Toward VSoCsRodríguez-Vázquez, Ángel ; Liñán-Cembrano, G.  ; Carranza-González, L. ; Roca, Elisenda ; Carmona-Galán, R. ; Jiménez-Garrido, Francisco; Domínguez-Castro, R. ; Espejo-Meana, S. artículo
openAccessaccurate error.pdf.jpg1999An accurate error control mechanism for simplification before generation algorithmsGuerra, Oscar ; Rodriguez-Garcia, J. D.; Roca, Elisenda ; Fernández, Francisco V. ; Rodríguez-Vázquez, Ángel comunicación de congreso
openAccessREDUCED_SIZED.pdf.jpg2017An automated design methodology of RF circuits by using pareto-optimal fronts of EM-simulated inductorsGonzález-Echevarría, R.; Roca, Elisenda ; Castro-López, R. ; Fernández, Francisco V. ; Sieiro, J.; López-Villegas, J. M.; Vidal, Neusartículo
closedAccessaccesoRestringido.pdf.jpg2012An automated layout-aware design flowToro-Frias, A. ; Castro-López, R. ; Roca, Elisenda ; Fernández, Francisco V. comunicación de congreso
openAccessIntegrationVLSI_side-o_v15.doc.pdf.jpg2017An inductor modeling and optimization toolbox for RF circuit designPassos, F.; Roca, Elisenda ; Castro-López, R. ; Fernández, Francisco V. artículo