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Instituto de Microelectrónica de Sevilla (IMSE-CNM)
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Results 1-8 of 8 (Search time: 0.011 seconds).
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Issue Date
Title
Author(s)
Type
1
openAccess
2016
Comparative Analysis of Projected Tunnel and CMOS Transistors for Different Logic Application Areas
Núñez, Juan
;
Avedillo, M. J.
artículo
2
openAccess
2017
Impact of pipeline in the power performance of tunnel transistor circuits
Avedillo, M. J.
;
Núñez, Juan
comunicación de congreso
3
openAccess
2017
Complementary tunnel gate topology to reduce crosstalk effects
Núñez, Juan
;
Avedillo, M. J.
comunicación de congreso
4
openAccess
2016
Assessing application areas for tunnel transistor technologies
Avedillo, M. J.
;
Núñez, Juan
comunicación de congreso
5
openAccess
2017
Exploring logic architectures suitable for TFETs devices
Núñez, Juan
;
Avedillo, M. J.
comunicación de congreso
6
openAccess
2017
Insights Into the Operation of Hyper-FET-Based Circuits
Avedillo, M. J.
;
Núñez, Juan
artículo
7
closedAccess
Sep-2017
Power and energy issues on lightweight cryptography
Acosta, Antonio José
;
Tena, E.
;
Jiménez Fernández, Carlos Jesús
;
Mora-Gutiérrez, J. M.
artículo
8
openAccess
2019
Power and speed evaluation of hyper-FET circuits
Núñez, Juan
;
Avedillo, M. J.
artículo
Discover
Author
7
Avedillo, M. J.
7
Núñez, Juan
1
Acosta, Antonio José
1
Jiménez Fernández, Carlos Jesús
1
Mora-Gutiérrez, J. M.
1
Tena, E.
Keywords
6
Steep subthreshold slope
5
Tunnel transistors
3
Energy efficieny
3
Low supply voltage
2
Low voltage
2
Phase transition materials
1
Concurrency
1
Cryptography
1
Emerging technologies
1
Energy effiency
.
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Date issued
1
2019
5
2017
2
2016