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Fully digital AER convolution chip for vision processing

AuthorsCamuñas-Mesa, L. ; Acosta, Antonio José ; Serrano-Gotarredona, Teresa ; Linares-Barranco, Bernabé
Issue Date2008
PublisherInstitute of Electrical and Electronics Engineers
CitationIEEE International Symposium on Circuits and Systems: 652-655 (2008)
AbstractWe present a neuromorphic fully digital convolution microchip for Address Event Representation (AER) spike-based processing systems. This microchip computes 2-D convolutions with a programmable kernel in real time. It operates on a pixel array of size 32 x 32, and the kernel is programmable and can be of arbitrary shape and size up to 32 x 32 pixels. The chip receives and generates data in AER format, which is asynchronous and digital. The paper describes the architecture of the chip, the test setup, and experimental results obtained from a fabricated prototype.
Identifiersdoi: 10.1109/ISCAS.2008.4541502
isbn: 978-1-4244-1683-7
Appears in Collections:(IMSE-CNM) Libros y partes de libros
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