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Compact low-power calibration mini-DACs for neural arrays with programmable weights

AuthorsLinares-Barranco, Bernabé ; Serrano-Gotarredona, Teresa ; Serrano-Gotarredona, Rafael
Issue Date2003
PublisherInstitute of Electrical and Electronics Engineers
CitationIEEE Transactions on Neural Networks 14(5): 1207-1216 (2003)
AbstractThis paper considers the viability of compact low-resolution low-power mini digital-to-analog converters (mini-DACs) for use in large arrays of neural type cells, where programmable weights are required. Transistors are biased in weak inversion in order to yield small currents and low power consumptions, a necessity when building large size arrays. One important drawback of weak inversion operation is poor matching between transistors. The resulting effective precision of a fabricated array of 50 DACs turned out to be 47% (1.1 bits), due to transistor mismatch. However, it is possible to combine them two by two in order to build calibrated DACs, thus compensating for inter-DAC mismatch. It is shown experimentally that the precision can be improved easily by a factor of 10 (4.8% or 4.4 bits), which makes these DACs viable for low-resolution applications such as massive arrays of neural processing circuits. A design methodology is provided, and illustrated through examples, to obtain calibrated mini-DACs of a given target precision. As an example application, we show simulation results of using this technique to calibrate an array of digitally controlled integrate-and-fire neurons.
Publisher version (URL)http://dx.doi.org/10.1109/TNN.2003.816370
Identifiersdoi: 10.1109/TNN.2003.816370
issn: 1045-9227
e-issn: 1941-0093
Appears in Collections:(IMSE-CNM) Artículos
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