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Title

CMOS inverter maximum frequency of operation due to digital signal degradation

AuthorsJuan-Chico, J. ; Bellido, M. J.; Acosta, Antonio José ; Barriga, Angel ; Valencia-Barrero, M.
Issue Date1997
PublisherInstitute of Electrical and Electronics Engineers
CitationElectronics Letters 33(19): 1619-1621 (1997)
AbstractAn operation frequency limit for the CMOS inverter is presented, based on delay degradation. This allows treatment of the problem from a purely logical viewpoint. Classical calculations are shown to lead to large over-estimations.
URIhttp://hdl.handle.net/10261/84888
DOI10.1049/el:19971102
Identifiersdoi: 10.1049/el:19971102
issn: 0013-5194
e-issn: 1350-911X
Appears in Collections:(IMSE-CNM) Artículos
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