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ASIC-in-the-loop methodology for verification of piecewise affine controllers

AuthorsMartínez-Rodríguez, Macarena Cristina; Brox, Piedad ; Castro, Javier; Tena, E. ; Acosta, Antonio José ; Baturone, I.
Issue Date2012
PublisherInstitute of Electrical and Electronics Engineers
Citation19th IEEE International Conference on Electronics, Circuits and Systems (ICECS): 388-391 (2012)
AbstractThis paper exposes a hardware-in-the-loop metho- dology to verify the performance of a programmable and confi- gurable application specific integrated circuit (ASIC) that imple- ments piecewise affine (PWA) controllers. The ASIC inserted into a printed circuit board (PCB) is connected to a logic analyzer that generates the input patterns to the ASIC (in particular, the values to program the memories, configuration parameters, and values of the input signals). The output provided by the ASIC is also taken by the logic analyzer. A Matlab program controls the logic analyzer to verify the PWA controller implemented by the ASIC in open-loop as well as in closed-loop configurations.
DescriptionComunicación presentada al "19th IEEE International Conference on Electronics, Circuits and Systems" celebrada en Sevilla (España) del 9 al 12 de Diciembre del 2012.
Publisher version (URL)http://dx.doi.org/10.1109/ICECS.2012.6463721
Identifiersdoi: 10.1109/ICECS.2012.6463721
isbn: 978-1-4673-1261-5
Appears in Collections:(IMSE-CNM) Libros y partes de libros
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