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A 190- μW zero-IF GFSK demodulator with a 4-b phase-domain ADC

AuthorsMasuch, Jens ; Delgado-Restituto, Manuel
Issue Date2012
PublisherInstitute of Electrical and Electronics Engineers
CitationIEEE Journal of Solid-State Circuits 47(11): 2796-2806 (2012)
AbstractThis paper presents a zero-IF Gaussian frequency-shift keying (GFSK) demodulator based on a phase-domain analog-to-digital converter (Ph-ADC) which directly quantizes the phase information of the received complex baseband signal. The Ph-ADC linearly combines the in-phase and quadrature parts of the incoming signal, and the generated phase-shifted versions are fed to comparators to detect the zero-crossings and build a 4-b digital representation of the signal phase. Seeking for a low-area and low-power consumption realization, our proposal employs a resistor-less scheme which performs phase rotations in current domain. Together with the Ph-ADC, the fully integrated GFSK demodulator also includes a channel-filtering programmable gain amplifier and a symbol decision block. Altogether, the demodulator occupies 0.14 mm 2 in a 0.13-μm CMOS technology with a total power consumption of 190 μW from a 1-V supply. For a data rate of 1 Mbps and 0.5 modulation depth, the GFSK demodulator requires an E B/N 0 of 14.8 dB for a bit error rate of 0.1% considering a flicker noise corner of 150 kHz, obtains a dynamic range of 74 dB, and is able to tolerate carrier frequency offsets of ±170 kHz. This performance safely complies with the requirements of the Bluetooth Low Energy (BLE) standard. © 2012 IEEE.
Identifiersdoi: 10.1109/JSSC.2012.2216211
issn: 0018-9200
Appears in Collections:(IMSE-CNM) Artículos
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