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All-MOS implementation of RC networks for time-controlled Gaussian spatial filtering

AuthorsFernández-Berni, J. ; Carmona-Galán, R.
KeywordsGaussian filtering
Focal-plane processing
RC networks
VLSI implementation
Issue DateAug-2012
CitationInternational Journal of Circuit Theory and Applications 40(8): 859-876 (2012)
AbstractThis paper addresses the design and VLSI implementation of MOS-based RC networks capable of performing time-controlled Gaussian filtering. In these networks, all the resistors are substituted one by one by a single MOS transistor biased in the ohmic region. The design of this elementary transistor is carefully realized according to the value of the ideal resistor to be emulated. For a prescribed signal range, the MOSFET in triode region delivers an interval of instantaneous resistance values. We demonstrate that, for the elementary 2-node network, establishing the design equation at a particular point within this interval guarantees minimum error. This equation is then corroborated for networks of arbitrary size by analyzing them from a stochastic point of view. Following the design methodology proposed, the error committed by an MOS-based grid when compared with its equivalent ideal RC network is, despite the intrinsic nonlinearities of the transistors, below 1% even under mismatch conditions of 10%. In terms of image processing, this error hardly affects the outcome, which is perceptually equivalent to that of the ideal network. These results, extracted from simulation, are verified in a prototype vision chip with QCIF resolution manufactured in the AMS 0.35µm CMOS-OPTO process. This prototype incorporates a focal-plane MOS-based RC network that performs fully programmable Gaussian filtering.
DescriptionEl pdf del artículo es la versión post-print.
Publisher version (URL)http://dx.doi.org/10.1002/cta.759
Appears in Collections:(IMSE-CNM) Artículos
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