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Título

A 0.13 μm CMOS adaptive sigma–delta modulator for triple-mode GSM/Bluetooth/UMTS applications

AutorMorgado, Alonso; Río, Rocío del; Rosa, José M. de la ; Castro-López, R. ; Pérez-Verdú, Belén
Palabras claveAnalog–digital conversion
Sigma–delta modulation
Mixed analog–digital integrated circuits
Multi-standard wireless applications
Fecha de publicaciónmay-2010
EditorElsevier
CitaciónMicroelectronics Journal 41(5): 277-290 (2010)
ResumenThis paper describes the design and experimental characterization of a 0.13 μm CMOS switched-capacitor reconfigurable cascade ΣΔ modulator intended for multi-standard GSM/Bluetooth/UMTS hand-held devices. Both architectural- and circuital-level reconfiguration strategies are incorporated in the chip in order to adapt the effective resolution and the output rate to different standard specifications with optimized power dissipation. This is achieved by properly combining different reconfiguration modes that include the variation in the order of the loop filter (3rd- or 4th-order), the clock frequency (40 or 80 MHz), the internal quantization (1 or 2 bits), and the bias currents of the amplifiers. The selection of the modulator topology and the design of its building blocks are based on a top-down CAD methodology that combines simulation and statistical optimization at different levels of the modulator hierarchy. Experimental measurements show a correct operation of the prototype for the three standards, featuring dynamic ranges of 83.8/75.9/58.7 dB and peak signal-to-(noise+distortion) ratios of 78.7/71.3/53.7 dB at 400 ksps/2/8 Msps, respectively. The modulator power consumption is 23.9/24.5/44.5 mW, of which 9.7/10/24.8 mW are dissipated in the analog circuitry. The multi-mode ΣΔ prototype shows an overall performance that is competitive with the current state of the art.
Versión del editorhttp://dx.doi.org/10.1016/j.mejo.2010.03.004
URIhttp://hdl.handle.net/10261/83156
DOI10.1016/j.mejo.2010.03.004
ISSN0026-2692
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