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Closed Access item 1 V CMOS subthreshold log domain PDM

Authors:Serra-Graells, F.
Huertas-Díaz, J. L.
Issue Date:2003
Citation:Analog Integrated Circuits and Signal Processing 34(3): 183-187 (2003)
Abstract:A new CMOS circuit strategy for very low-voltage Pulse-Duration Modulators (PDM) is proposed. Optimization of voltage supply scaling below the sum of threshold voltages is based on Instantaneous Log Companding processing through the MOSFET operating in weak inversion. A 1 V VLSI PDM circuit for very low-voltage audio applications such as Hearing Aids is presented, showing good agreement between simulated and experimental data.
Identifiers:doi: 10.1023/A:1022545414777
issn: 0925-1030
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