Por favor, use este identificador para citar o enlazar a este item:
http://hdl.handle.net/10261/3598
COMPARTIR / EXPORTAR:
SHARE BASE | |
Visualizar otros formatos: MARC | Dublin Core | RDF | ORE | MODS | METS | DIDL | DATACITE | |
Título: | High-Order Cascade Multi-bit ΣΔ Modulators for High-Speed A/D Conversion |
Autor: | Río, Rocío del CSIC ORCID; Medeiro, Fernando CSIC; Pérez-Verdú, Belén CSIC; Rodríguez-Vázquez, Ángel CSIC ORCID | Palabras clave: | ΣΔ Modulator A/D Conversion Communication Frequency Range |
Fecha de publicación: | nov-1998 | Editor: | Universidad Carlos III de Madrid | Citación: | Proc. Design of Circuits and Integrated Systems Conf. (DCIS’98), pp. 76-81, Madrid, November 1998. | Resumen: | The use of Sigma-Delta (ΣΔ) modulation for analog-to-digital conversion (ADC) in the communication frequency range is evaluated. Two high-order multi-bit architectures are proposed to achieve +12-bit dynamic range at 4Msample/s Nyquist rate using very low oversampling ratio. They show very low sensitivity to the internal D-to-A conversion (DAC) error with no calibration required. Simulations show that such performance can be achieved even in presence of circuit imperfections. | URI: | http://hdl.handle.net/10261/3598 |
Aparece en las colecciones: | (IMSE-CNM) Comunicaciones congresos |
Ficheros en este ítem:
Fichero | Descripción | Tamaño | Formato | |
---|---|---|---|---|
Higher_order_cascade.pdf | 115,71 kB | Adobe PDF | Visualizar/Abrir |
CORE Recommender
Page view(s)
292
checked on 18-abr-2024
Download(s)
190
checked on 18-abr-2024
Google ScholarTM
Check
NOTA: Los ítems de Digital.CSIC están protegidos por copyright, con todos los derechos reservados, a menos que se indique lo contrario.