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Open Access item A 74dB Dynamic Range, 1.1-MHz Signal Band 4th-Order 2-1-1 Cascade Multi-Bit CMOS ΣΔ Modulator for ADSL

Authors:Medeiro, Fernando
Pérez Verdú, Belén
Rodríguez Vázquez, Angel
Keywords:ΣΔ Modulator, A/D Conversion, CMOS A/D Converter
Issue Date:Sep-1997
Citation:European Solid-State Circuits Conference (ESSCIRC’97), pp. 72-75, Southampton - UK, September 16-18, 1997.
Abstract:This paper explores the use of ΣΔ techniques for A/D conversion exceeding 1-MHz signal bandwidth. A cascade modulator architecture is proposed which combines single-bit and multi-bit quantization to obtain more than 12-b Dynamic Range (DR) with an oversampling ratio of only 16, and with neither calibration nor trimming required. Measurements from a 0.7mm CMOS prototype show 74dB DR in 1.1-MHz signal band at 35.7-MHz clock rate, with a power consumption of 55mW from a 5-V supply.
Appears in Collections:(IMS-CNM) Comunicaciones congresos

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