Please use this identifier to cite or link to this item: http://hdl.handle.net/10261/33818
Share/Export:
logo share SHARE logo core CORE BASE
Visualizar otros formatos: MARC | Dublin Core | RDF | ORE | MODS | METS | DIDL | DATACITE

Invite to open peer review
Title

Low temperature InP/Si technology: from Si substrate preparation to epitaxial growth

AuthorsGonzález Sotos, Luisa CSIC ORCID ; González Díez, Yolanda CSIC ORCID; Dotor-Castilla, María Luisa CSIC ORCID; Golmayo, Dolores CSIC; Gómez, D.; Briones Fernández-Pola, Fernando CSIC
Issue DateFeb-1994
PublisherInstitution of Engineering and Technology
CitationElectronics Letters 30(3): 269-271 (1994)
AbstractInP layers have been grown on Si(001) substrates by using a low temperature process, both for the Si surface preparation (400°C<T Si<550°C) and for the growth process itself (Tg <350°C) using solid source atomic layer molecular beam epitaxy. Strain-free InP on Si layers, with an etch pit density of ~1-2×107 cm-2, showing an excellent morphology and good optical quality have been obtained using a buffer layer involving strain layer superlattices (SLS) of elastically dissimilar materials. This result implies an actual advancement towards monolithic integration of III-V devices to conventional CMOS-Si circuits.
Description3 páginas, 2 figuras.
Publisher version (URL)http://dx.doi.org/10.1049/el:19940124
URIhttp://hdl.handle.net/10261/33818
DOI10.1049/el:19940124
ISSN0013-5194
Appears in Collections:(IMN-CNM) Artículos

Show full item record

CORE Recommender

SCOPUSTM   
Citations

4
checked on Mar 29, 2024

WEB OF SCIENCETM
Citations

2
checked on Feb 21, 2024

Page view(s)

317
checked on Apr 22, 2024

Google ScholarTM

Check

Altmetric

Altmetric


WARNING: Items in Digital.CSIC are protected by copyright, with all rights reserved, unless otherwise indicated.