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Please use this identifier to cite or link to this item: http://hdl.handle.net/10261/33818
Title: Low temperature InP/Si technology: from Si substrate preparation to epitaxial growth
Authors: González Sotos, Luisa ; González Díez, Yolanda ; Dotor, María Luisa ; Golmayo, Dolores; Gómez, D.; Briones Fernández-Pola, Fernando
Issue Date: Feb-1994
Publisher: Institution of Engineering and Technology
Citation: Electronics Letters 30(3): 269-271 (1994)
Abstract: InP layers have been grown on Si(001) substrates by using a low temperature process, both for the Si surface preparation (400°C<T Si<550°C) and for the growth process itself (Tg <350°C) using solid source atomic layer molecular beam epitaxy. Strain-free InP on Si layers, with an etch pit density of ~1-2×107 cm-2, showing an excellent morphology and good optical quality have been obtained using a buffer layer involving strain layer superlattices (SLS) of elastically dissimilar materials. This result implies an actual advancement towards monolithic integration of III-V devices to conventional CMOS-Si circuits.
Description: 3 páginas, 2 figuras.
Publisher version (URL): http://dx.doi.org/10.1049/el:19940124
URI: http://hdl.handle.net/10261/33818
DOI: 10.1049/el:19940124
ISSN: 0013-5194
Appears in Collections:(IMM-CNM) Artículos
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