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Photon-Detection Timing-Jitter Model in Verilog-A

AuthorsLópez-Martínez, Juan Manuel; Carmona-Galán, R. ; Rodríguez-Vázquez, Ángel
Electric fields
timing jitte
Single-photon avalanche diode (SPAD)
Device simulation
Issue Date2020
PublisherInstitute of Electrical and Electronics Engineers
CitationIEEE International Symposium on Circuits and Systems (ISCAS). 2020
AbstractSingle-photon avalanche diodes can be employed to register the arrival of an individual photon. They are biased beyond breakdown voltage, and thus the electron-hole pairs generated by any incident photon is accelerated by the strong electric field triggering an avalanche current. In recent years, there have been attempts to model its characteristics in Verilog-A HDL. However, none of them have modelled its photon-detection timing jitter. This paper explains the mechanism of avalanche triggering and proposes a first approach to model it in Verilog-A. Comparison with experimental data and data reported in literature validates the model.
Publisher version (URL)https://doi.org/10.1109/ISCAS45731.2020.9181222
Appears in Collections:(IMSE-CNM) Artículos
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