Design of a 9-bit 4MS/s wilkinson ADC for SiPM-based imaging detectors

Abstract

This paper presents the design and electrical implementation of a Wilkinson analog-to-digital converter for imaging detectors based on the use of silicon photo-multiplier scintillators. A multi-channel architecture, which shares the ramp generator among the different channels, is used to maximize the sampling frequency with the minimum power consumption and silicon area. The circuit has been implemented in a 0.35-μm CMOS technology up to the layout level, featuring state-of-the-art performance with 9-bit effective resolution, 4-MS/s sampling frequency, 0.95mW/channel, while clocked at 2.56GS/s with 1.5-V full-scale range.