2024-03-29T14:34:19Zhttp://digital.csic.es/dspace-oai/requestoai:digital.csic.es:10261/332162019-11-20T11:11:38Zcom_10261_90com_10261_4col_10261_343
00925njm 22002777a 4500
dc
Barragán, Manuel J.
author
Fiorelli, R.
author
Leger, Gildas
author
Rueda, Adoración
author
Huertas-Díaz, J. L.
author
2011-01-06
This paper presents a novel and low-cost methodology for testing embedded Low Noise Amplifiers (LNAs). It is based on the detection and analysis of the response envelope of the Device Under Test (DUT) to a two-tone input signal. The envelope signal is processed to obtain a digital signature sensitive to key specifications of the DUT. An optimized regression model based on ensemble learning is used to relate the digital signatures to the target specifications. A new Figure of Merit (FOM) is proposed to evaluate the prediction accuracy of the statistical model, and a demonstrator has been developed to prove the feasibility of the approach. This demonstrator features a 2.445 GHz low-power LNA and a simple envelope detector, and has been developed in a 90 nm CMOS technology. Post-layout simulations are provided to verify the functionality of the proposed test technique
Journal of Electronic Testing 27(3): 277-288 (2011)
0923-8174
http://hdl.handle.net/10261/33216
10.1007/s10836-010-5193-4
RF test
RF BIST
Ensemble learning
Signature test
Alternate test of LNAs through ensemble learning of on-chip digital envelope signatures